-- Copyright © 1993 by  McGraw-Hill, Inc. and Zainalabedin Navabi

-- FIGURE 5.47 




-- CONFIGURING D REGISTER FOR USING SINGLE DELAY ARCHITECTURE OF 
   INV AND NAND2 :

USE WORK.ALL;
CONFIGURATION single_gate_delay OF d_register IS
  FOR latch_based
    FOR d8
      FOR di : dl
        USE ENTITY WORK.d_latch(sr_based);
        FOR sr_based
          FOR c1 : sr
            USE ENTITY WORK.sr_latch(gate_level);
            FOR gate_level
              FOR g2, g4 : n2
                USE ENTITY WORK.nand3(single_delay)
                PORT MAP (i1, i1, i2, o1);
              END FOR;
              FOR g1, g3 : n2
                USE ENTITY WORK.nand2(single_delay);
              END FOR;
            END FOR;
          END FOR;
          FOR c2 : n1
            USE ENTITY WORK.inv(single_delay);
          END FOR;
        END FOR;
      END FOR;
    END FOR;
  END FOR;
END single_gate_delay;
--