-- Copyright © 1993 by  McGraw-Hill, Inc. and Zainalabedin Navabi

-- FIGURE 5.42 




-- ENTITY DECLERATION OF D-LATCH :

ENTITY d_latch IS PORT (d, c : IN BIT; q : OUT BIT);
END d_latch;
--



-- UNBOUND VHDL DESCRIPTION FOR A D-LATCH :

USE WORK.ALL;
ARCHITECTURE sr_based OF d_latch IS
  COMPONENT sr PORT (s, r, c : IN BIT; q : OUT BIT); END COMPONENT;
  COMPONENT n1 PORT (i1: IN BIT; o1: OUT BIT); END COMPONENT;
  SIGNAL dbar : BIT;
BEGIN  
   c1 : sr PORT MAP (d, dbar, c, q); 
   c2 : n1 PORT MAP (d, dbar); 
END sr_based;
--