xnfprep [5.1.0] -- Xilinx Automatic CAE Tools Copyright (c) 1995 Xilinx Inc. All Rights Reserved. + xnfprep @ 1995/04/09 17:24:40 [00:00:03] + Parameters ----------------------- design = lfsr.xff outfile = lfsr.xtf report = *** savesig = FALSE parttype = 3042PC84-50 cstfile = *** logfile = xnfprep.log ----------------------- xnfprep: running design rule checker ... xnfprep: trimming unnecessary and redundant logic... xnfprep: running design rule checker on trimmed design... XNFPREP SUMMARY --------------- 0 Errors found 1 Warnings found 0 Unnecessary inverters and buffers removed 0 Unnecessary or disabled symbols removed 0 Sourceless or loadless signals removed Refer to the lfsr.prp file for details. Output netlist written to file lfsr.xtf. - xnfprep @ 1995/04/09 17:24:46 [00:00:07] = -------- @ 1995/04/09 00:00:06 [00:00:04] + xnfprep required [878.929] Kbytes of dynamic/allocated memory <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>