ECLPS Library Models

This page contains models from the ECLPS library in VHDL. The ECLPS library contains models of the ECLinPS and ECLinPS Lite Logic families from Motorola and others.

These ECLPS library models are from non-RASSP sources.

  • FTP to VHDL.ORG Site -- ECLPS016
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 8-Bit Synchronous Binary Up Counter
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS101
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quint 4-input OR gate with complementary
    NOR output
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS104
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-input AND gate with
    complementary NAND output. 5 gates in a package driving
    an OR/NOR output from all 5 gates make the 5-gate model
    the smallest primitive possible.
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS107
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-input XOR gate with
    complementary NOR output. 5 gates in a package
    driving an OR output from all
    5 gates make the 5-gate model the smallest primitive possible.
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS111
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology clock driver with 9 outputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS112
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Quad Driver
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS116
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quint Differential Line Receiver
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS122
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 9-Bit Buffer
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS131
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 4-Bit D Flip-Flop with Set, Reset
    and Clock Enable
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS136
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 6-Bit Universal
    Up/Down Counter
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS141
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 8-Bit Shift Register with parallel load
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS142
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 9-Bit Shift Register
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS143
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 9-Bit Hold Register
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS150
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 6-bit D Latch with Reset and 2 OR'd enables
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS151
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 6-bit D Flip-Flop with Reset and 2 OR'd clocks
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS154
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 5-Bit 2:1 Mux-Latch with Reset and
    2 OR'd enables
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS156
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 3-Bit 4:1 Mux-Latch
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS157
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quad 2:1 Multiplexer with differential outputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS158
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 5-bit 2:1 Multiplexer with differential outputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS167
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 2:1 Mux-Register with Reset
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS171
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 3-Bit 4:1 Multiplexer with three select
    control inputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS210
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Dual 1:4 and 1:5 Fanout Buffer,
    Asymmetric sections
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS404
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quad 2-input differential AND/NAND
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS416
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quint Differintial Line Receiver
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS431
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : 3-bit Differential Flip-Flop with Edge
    Triggered Set and Reset
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS445
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 4-Bit Serial/Parallel Converter
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS446
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 4-Bit Parallel/Serial Converter
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS451
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : D Flip-Flop with Differential Inputs and Reset
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS452
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Differential Register
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPS457
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Triple differential 2-1 Mux
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl01
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 4-input OR gate with
    complementary NOR output
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl04
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-Input AND/NAND
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl05
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-Input differential AND/NAND,
    Input clamp not modeled
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl07
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-Input AND/NAND
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl11
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-Input XOR gate with
    complementary XNOR output
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl12
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2-Input OR gate with
    complementary NOR output
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl13
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Dual 1:3 Fanout Buffer
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl15
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 1 to 4 clock distributor with
    enable and select mux
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl16
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Differential receiver, Input
    clamp not modeled
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl17
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Quad Low-voltage Differential receiver
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl31
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Single D Flip-Flop with
    Set and Reset
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl32
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology Divide by 2 with Reset and
    Differential Clock
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl33
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Divide by 4 with Reset and Differential Clock
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl34
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Divide by 2, 4, and 8 with Reset and
    Differential Clock
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl35
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : JK Flip-Flop
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl38
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Divide by 2 and Divide by 4 or 6 Clock
    Generation Chip
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl51
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : D Flip-Flop with Differential Inputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl52
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : D Flip-Flop with Differential Inputs
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl56
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Dual Differential 2:1 Mux
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl57
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 4:1 Differential Mux
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl58
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : ECL Technology 2:1 Mux
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl59
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Triple 2:1 Mux with common select
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSl89
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Coaxial cable driver
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT20
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : TTL to Differential PECL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT21
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Differential PECL to TTL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT22
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : TTL to Differential PECL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT23
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Differential PECL to TTL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT24
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : TTL to Differential ECL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSLT25
    Accompanying Packages Required : Download Packages
    Accompanying Timing File: Download Timing File
    Description : Differential ECL to TTL Translator
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

  • FTP to VHDL.ORG Site -- ECLPSS838
    Accompanying Packages Required : Download Packages
    Description : Divide by 2 and Divide by 4 or 6 or
    Divide by 1 and Divide by 2 or 3 Clock Generation Chip
    Accompanying Timing File: Download Timing File
    General Taxonomy Level : VITAL 3.0 Compliant
    Created by : Free Model Foundation : ECLPS Library

Last Modified 04/06/1999 16:47:32
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