--
-- component reg4
-- when enable is low, the register will output high impedance,
-- but when it goes high, the register will store the value
--
LIBRARY ieee; USE ieee.std_logic_1164.all;
ENTITY reg4 IS
PORT ( data : INOUT std_logic_vector(3 downto 0);
enable : IN std_logic );
END ENTITY reg4;
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