LIBRARY ieee; USE ieee.std_logic_1164.all; architecture behavior of jkff is begin p1 : process (set, reset, clk) is variable current_q, next_q : std_logic; begin current_q := next_q; if set = '1' and reset = '1' then next_q := 'X'; elsif set = '1' and reset = '0' then next_q := '1'; elsif set = '0' and reset = '1' then next_q := '0'; elsif set = '0' and reset = '0' and rising_edge(clk) then case std_logic_vector'(j, k) is when "00" => next_q := current_q; when "10" => next_q := '1'; when "01" => next_q := '0'; when "11" => next_q := NOT current_q; when others => next_q := 'X'; end case; end if; q <= next_q after; end process p1; end architecture behavior;