-- entity declaration for a BCD six-digit counter with an -- asynchronous reset input. -- (reworked from solution to Ashenden problem 5.26) LIBRARY ieee; USE ieee.std_logic_1164.all; architecture spec of six_counter is begin count : process (clock, reset) is variable next_q : std_logic_vector(2 downto 0) := "000"; variable carry : std_logic; begin if reset = '1' then next_q := "000"; q <= next_q after 5 ns; elsif en = '1' and rising_edge(clock) then carry := '1'; -- to increment for n in 0 to 2 loop if next_q(n) = '0' then next_q(n) := carry; carry := '0'; else next_q(n) := not carry; end if; end loop; -- check for values 6 and over and make them 0 if next_q(2) = '1' and next_q(1) = '1' then next_q := "000"; sync <= '1'; else sync <= '0'; end if; q <= next_q after 5 ns; end if; end process count; end architecture spec;