-- -- Rcsid[] = "$Id: m5.vhd,v 2.1 1993/10/06 01:04:36 alex Exp $"; -- entity M5 is port(Q: out logic_vector(4 downto 0); CKN,VCC,SYSRESET,INSTRESET: in bit); end; architecture structure of M5 is signal A, AN, B, BN, C, CN: bit; signal CK, RS: bit; begin NAND0 : OR_gate generic map(1,1) port map(Q(0),AN,B,C); NAND1 : OR_gate generic map(1,1) port map(Q(1),A,BN,C); NAND2 : OR_gate generic map(1,1) port map(Q(2),AN,BN,C); NAND3 : OR_gate generic map(1,1) port map(Q(3),A,B,CN); NAND4 : OR_gate generic map(1,1) port map(Q(4),AN,B,CN); AND0 : AND_gate generic map(3,3) port map(RS,SYSRESET,INSTRESET); DFFA : DFF1 port map(A,AN,CK,RS,VCC); INVA : inv_gate port map(AN,A); DFFB : DFF1 port map(B,BN,AN,VCC,RS); INVB : inv_gate port map(BN,B); DFFC : DFF1 port map(C,CN,BN,VCC,RS); INVC : inv_gate port map(CN,C); INV : inv_gate port map(CK,CKN); end structure;