--
-- Rcsid[] = "$Id: sn54181.vhd,v 2.1 1993/10/06 01:04:36 alex Exp $";
--

entity sn54181 is
port(F3, F2, F1, F0: out bit;
     A_EQ_B, X, Cn4, Y: out bit;
     S3, S2, S1, S0: in bit;
     A3, A2, A1, A0: in bit;
     B3, B2, B1, B0: in bit;
     M, Cn: in bit);
end;

architecture structure of sn54181 is

signal z1, z2, z3, z4, z5, z6, z7, z8, z9: bit;
signal z10, z11, z12, z13, z14, z15, z16, z17, z18, z19: bit;
signal z20, z21, z22, z23, z24, z25, z26, z27, z28, z29: bit;
signal z30, z31, z32, z33, z34, z35, z36, z37, z38, z39: bit;
signal z40, z41, z42, z44, z45, z46, z47, z48, z49: bit;
signal z50, z51, z52, z53, z55, z56, z57 : bit;
signal F3B, F2B, F1B, F0B, YB: bit;

begin

U1 : inv_gate generic map (2,2) port map (z1,B3);
U2 : inv_gate generic map (2,2) port map (z2,B2);
U3 : inv_gate generic map (2,2) port map (z3,B1);
U4 : inv_gate generic map (2,2) port map (z4,B0);
U5 : and_gate generic map (1,1) port map (z5,B3,S3,A3);
U6 : and_gate generic map (1,1) port map (z6,A3,S2,z1);
U7 : and_gate generic map (2,2) port map (z7,z1,S1);
U8 : and_gate generic map (2,2) port map (z8,S0,B3);
U9 : buf_gate generic map (2,2) port map (z9,A3);
U10 : and_gate generic map (1,1) port map (z10,B2,S3,A2);
U11 : and_gate generic map (1,1) port map (z11,A2,S2,z2);
U12 : and_gate generic map (2,2) port map (z12,z2,S1);
U13 : and_gate generic map (2,2) port map (z13,S0,B2);
U14 : buf_gate generic map (2,2) port map (z14,A2);
U15 : and_gate generic map (1,1) port map (z15,B1,S3,A1);
U16 : and_gate generic map (1,1) port map (z16,A1,S2,z3);
U17 : and_gate generic map (2,2) port map (z17,z3,S1);
U18 : and_gate generic map (2,2) port map (z18,S0,B1);
U19 : buf_gate generic map (2,2) port map (z19,A1);
U20 : and_gate generic map (1,1) port map (z20,S3,B0,A0);
U21 : and_gate generic map (1,1) port map (z21,A0,S2,z4);
U22 : and_gate generic map (2,2) port map (z22,z4,S1);
U23 : and_gate generic map (2,2) port map (z23,S0,B0);
U24 : buf_gate generic map (2,2) port map (z24,A0);
U25 : nor_gate generic map (2,2) port map (z25,z5,z6);
U26 : nor_gate generic map (2,2) port map (z26,z7,z8,z9);
U27 : nor_gate generic map (2,2) port map (z27,z10,z11);
U28 : nor_gate generic map (2,2) port map (z28,z12,z13,z14);
U29 : nor_gate generic map (2,2) port map (z29,z15,z16);
U30 : nor_gate generic map (2,2) port map (z30,z17,z18,z19);
U31 : nor_gate generic map (2,2) port map (z31,z20,z21);
U32 : nor_gate generic map (2,2) port map (z32,z22,z23,z24);
U33 : xor_gate generic map (2,2) port map (z33,z25,z26);
U34 : xor_gate generic map (2,2) port map (z34,z27,z28);
U35 : xor_gate generic map (2,2) port map (z35,z29,z30);
U36 : xor_gate generic map (2,2) port map (z36,z31,z32);
U37 : inv_gate generic map (2,2) port map (z37,M);
U38 : buf_gate generic map (2,2) port map (z38,z26);
U39 : and_gate generic map (2,2) port map (z39,z25,z28);
U40 : and_gate generic map (2,2) port map (z40,z25,z27,z30);
U41 : and_gate generic map (2,2) port map (z41,z25,z27,z29,z32);
U42 : nand_gate generic map (2,2) port map (z42,z25,z27,z29,z31,Cn);
U43 : nand_gate generic map (2,2) port map (X,z25,z27,z29,z31);
U44 : and_gate generic map (2,2) port map (z44,z27,z29,z31,Cn,z37);
U45 : and_gate generic map (2,2) port map (z45,z27,z29,z32,z37);
U46 : and_gate generic map (2,2) port map (z46,z27,z30,z37);
U47 : and_gate generic map (2,2) port map (z47,z28,z37);
U48 : and_gate generic map (2,2) port map (z48,Cn,z29,z31,z37);
U49 : and_gate generic map (2,2) port map (z49,z29,z32,z37);
U50 : and_gate generic map (2,2) port map (z50,z30,z37);
U51 : and_gate generic map (2,2) port map (z51,Cn,z31,z37);
U52 : and_gate generic map (2,2) port map (z52,z32,z37);
U53 : nand_gate generic map (2,2) port map (z53,Cn,z37);
U54 : nor_gate generic map (2,2) port map (YB,z38,z39,z40,z41);
U55 : nor_gate generic map (2,2) port map (z55,z44,z45,z46,z47);
U56 : nor_gate generic map (2,2) port map (z56,z48,z49,z50);
U57 : nor_gate generic map (2,2) port map (z57,z51,z52);
U58 : nand_gate generic map (2,2) port map (Cn4,YB,z42);
U59 : xor_gate generic map (2,2) port map (F3B,z33,z55);
U60 : xor_gate generic map (2,2) port map (F2B,z34,z56);
U61 : xor_gate generic map (2,2) port map (F1B,z35,z57);
U62 : xor_gate generic map (2,2) port map (F0B,z36,z53);
U63 : and_gate generic map (2,2) port map (A_EQ_B,F0B,F1B,F2B,F3B);
U54a : buf_gate port map (Y, YB);
U59a : buf_gate port map (F3,F3B);
U60a : buf_gate port map (F2,F2B);
U61a : buf_gate port map (F1,F1B);
U62a : buf_gate port map (F0,F0B);
end structure;

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