Test-specific Entities
For each test there is a separate testbench which uses test-specific
transactors. For example there may be a microprocessor transactor
mp.vhd. The testbench tb_test1 would then instantiate a test-specific
microprocessor transactor mp_test1.vhd which would be coded by enhancing
the mp.vhd template.
Some problems of this approach are:
- Bug fixes in the transactor code may have to be made in many files
- Results in a large number of files which are difficult to handle
Some of the benefits are:
- Pure VHDL, no dependency on OS specific tools
- Tests can be compiled before simulation, so syntax errors are detected before the
simulation runs
- Tests can be readily understood by designers who are familiar with VHDL
- All structural elements of VHDL are available
- Tests can react flexibly on the response of the DUT, full access to all signals known to the
transactor is possible